Design of an Optimal Decimal Adder in Quantum Dot Cellular Automata

Integrated Circuit (IC) Technology is growing day by day to enhance the circuit performance and to increase the density for compact systems. Conventional CMOS technology is playing a vital role in digital computation for past four decades. But there are certain challenges in scaling the CMOS devices for the last few years. A novel technology “Quantum dot Cellular Automata (QCA)” has been identified as an upcoming nanoelectronic technology to overcome the limitations in the transistor based CMOS technology. In order to bring a new concept of IC design in an efficient and optimized manner; it is proposed here an efficient architecture for BCD adder in QCA technology using an area optimized QCA full adder. The proposed BCD adder circuit optimize the QCA design metrics such as cost function, layout area and number of QCA cells in comparison with the existing BCD adder designs.